Linux

NAVIGATION
CATEGORIES
REFERRENCE
LINKS
  • 4gb (4 memory sticks) at 400Mhz on socket 939 MB

    8 answers - 832 bytes - related search similar search Add To My Delicious Add To My Stumble Upon Add To My Google Mark Add To My Facebook Add To My Digg Add To My Reddit

    Is it possible to find an AMD 64 socket 939 motherboard which supports 4
    memory sticks of 4GB to run at max speed 400MHz? From some available MB
    manuals the speed is either downgraded to 333MHz when 4 mem sticks are used
    or there is no mention of the issue at all.

    >From my search on google, some blame it on limitation of the motherboard

    chipset. blame it on processors prior to the E revision. Nothing on
    the net I came across would be a clear answer.
    I would suspect that tyan K8E (and K8E-SLI) doesn't have this limitation, does
    it? Because I saw at amd website some bechmarks on systems built on this
    motherboard with 4GB installed. However no say on wether these system were
    running at 400MHz FSB or less.
    I appreciate help and any clarification.
  • No.1 | | 1892 bytes | |

    Sat, 2006-07-08 at 13:22 -0500, Mohamad Al-Saqer wrote:
    Is it possible to find an AMD 64 socket 939 motherboard which supports 4
    memory sticks of 4GB to run at max speed 400MHz? From some available MB
    manuals the speed is either downgraded to 333MHz when 4 mem sticks are used
    or there is no mention of the issue at all.

    JEDEC specifications require that only one (1) DDR 200MHz
    (DDR400/PC-3200) 64-bit DIMM be used per 64-bit channel (2x32-bit
    banks), or two (2) for registered per 64-bit channel (4x32-bit banks).

    That means a maximum of (2) DDR DIMMs for unregistered Socket-939.
    That means a maximum of (4) DDR DIMMs for registered Socket-940.

    From my search on google, some blame it on limitation of the motherboard
    chipset. blame it on processors prior to the E revision. Nothing on
    the net I came across would be a clear answer.

    Hit many discussions on JEDEC DDR specifications.
    Here's the rule

    DDR 100MHz (DDR200, PC1600)
    3 DIMMs/channel, 6 DIMMs for S939, 12 DIMMs for S940

    DDR 133/166MHz (DDR266/333, PC2100/2700)
    2 DIMMs/channel, 4 DIMMs for S939, 8 DIMMs for S940

    DDR 200MHz (DDR400, PC3200)
    1 DIMM/channel, 2 DIMMs for S939, 4 DIMMs for S940

    I would suspect that tyan K8E (and K8E-SLI) doesn't have this limitation, does
    it? Because I saw at amd website some bechmarks on systems built on this
    motherboard with 4GB installed. However no say on wether these system were
    running at 400MHz FSB or less.
    I appreciate help and any clarification.

    As above.

    BTW, your greater concern than signaling is timing. Slower timed DDR400
    DIMMs often cause more of an impact that faster timed DDR333 DIMMs.

    I personally use at least 2.5-3-3-6 for DDR400.

    If you're using 3-3-3-8 or worse for DDR400, you might as well run at
    DDR333.
  • No.2 | | 890 bytes | |

    Saturday 08 July 2006 14:43, Bryan J. Smith wrote:
    <snip>
    Thanks for the details - I had a hard time finding that :-)

    As above.

    BTW, your greater concern than signaling is timing. Slower timed DDR400
    DIMMs often cause more of an impact that faster timed DDR333 DIMMs.

    I personally use at least 2.5-3-3-6 for DDR400.

    If you're using 3-3-3-8 or worse for DDR400, you might as well run at
    DDR333.

    Have you guys actually measured the impact of the memory speed? I'm running a
    few servers - dual 280s with 4GB ram each - that run queries against a
    smallisch in memory DB this should be about as memory intensive as any
    application can get (unless you're running UMA graphics). Some systems have
    266Mhz memory - others 400. It looks like even in this setup, all I can see
    is less than 3% difference

    Peter.
  • No.3 | | 745 bytes | |

    Sat, 8 Jul 2006, Mohamad Al-Saqer wrote:

    Is it possible to find an AMD 64 socket 939 motherboard which supports 4
    memory sticks of 4GB to run at max speed 400MHz? From some available MB
    manuals the speed is either downgraded to 333MHz when 4 mem sticks are used
    or there is no mention of the issue at all.

    For what it is worth:

    The current Linux Journal is their "Ultimate Linux Box" issue, featuring
    AMD 939 dual core. They address the memory speed issue explicitly and
    claim a bios setting gets 400MHz with no glitches on the ABIT AN8 32x 939
    board. The same article said that 3GB did not reset the bus to 333MHz.
    They also said that the real issue was populating all memory banks.

    Mark Hansel
  • No.4 | | 1677 bytes | |

    Sat, 2006-07-08 at 14:53 -0400, Peter Arremann wrote:
    Have you guys actually measured the impact of the memory speed? I'm running a
    few servers - dual 280s with 4GB ram each - that run queries against a
    smallisch in memory DB this should be about as memory intensive as any
    application can get (unless you're running UMA graphics). Some systems have
    266Mhz memory - others 400. It looks like even in this setup, all I can see
    is less than 3% difference

    Depends on how much you write to memory (essentially no latency) and how
    much you read from memory, it's burst length (size) and how random they
    are (the greatest latency hit).

    Remember, even though the synchronous timing is 2.5ns (400MHz effective)
    for writes or burst reads (after the initial latency), read latency is
    typically 20-60ns (only 16-50MHz!). So the more you are reading smaller
    chunks randomly, the more synchronous timing doesn't mean squat.

    Although this is a mega-oversimplification (and _not_ actual), at DDR
    200MHz (400MHz effective aka DDR400/PC3200), the last timing essentiall
    mean
    4 = 20ns (50MHz)
    5 = 25ns (40MHz)
    6 = 30ns (33MHz)
    8 = 40ns (25MHz)
    10 = 50ns (20MHz)
    12 = 60ns (16MHz!)

    That's what you're waiting on for the first few bytes! Yikes!

    At some point, if you're reading a lot of random areas of memory, and
    your L1+L2 (possibly +L3) cache hit rate is closer to 94% than 97% or
    so, you're going to be tying up the memory bus with a lot of wait. The
    _true_ dual-channel interleaved nature of S939/940 helps, but it's still
    significant.
  • No.5 | | 351 bytes | |

    Saturday 08 July 2006 1:43, Bryan J. Smith wrote:
    That means a maximum of (2) DDR DIMMs for unregistered Socket-939.
    That means a maximum of (4) DDR DIMMs for registered Socket-940.

    most motherboards support registered memory. Does this mean if ECC
    non-buffered memory sticks is installed on 939 MB we get around these
    limitations?
  • No.6 | | 1111 bytes | |

    Sat, 2006-07-08 at 15:33 -0500, Mohamad Al-Saqer wrote:
    most motherboards support registered memory.

    Remember, the memory controller and channels are on the processor in AMD
    Athlon 64 /

    AMD _only_ supports _unregistered_ on Socket-939.
    And AMD _only_ supports _registered_ on Socket-940.

    Now there are some claims that some Socket-940 processors will,
    unofficially, work with unregistered DIMMs. But I haven't seen it
    personally.

    Going the other way, I don't think registered works with any Socket-939
    processor at all. I certainly have not heard anyone doing that.

    Does this mean if ECC non-buffered memory sticks

    Umm, that's _unregistered_. Did you mean registered?
    [ BTW, ECC does _not_ matter when it comes to signaling ]

    is installed on 939 MB we get around these limitations?

    You can only use unregistered on Socket-939.

    At DDR400, that's 1 DIMM per channel, so maximum 2 DIMMs.
    At DDR333, that's 2 DIMMs per channel, so maximum 4 DIMMs.

    Expect any unstable system if you do otherwise.
  • No.7 | | 629 bytes | |

    At DDR400, that's 1 DIMM per channel, so maximum 2 DIMMs.
    At DDR333, that's 2 DIMMs per channel, so maximum 4 DIMMs.

    Expect any unstable system if you do otherwise.

    I believe this ignores another relevant factor: how many chip-selects
    the dimm uses. my understanding is that if a dimm is "double-sided",
    it means that it uses 2 CS's. table 46 on p 182 of AMD's bios guide
    (doc 26094) appears to allow up to 6 ranks for ddr400/2T operation.
    afaikt, a double-rank dimm is AKA double-sided. unfortunatley AMD also
    adds some weaselish text about how MB vendors should validate, etc
  • No.8 | | 2806 bytes | |

    Sun, 2006-07-09 at 01:40 -0400, hahn (AT) physics (DOT) mcmaster.ca wrote:
    I believe this ignores another relevant factor:
    how many chip-selects the dimm uses.

    I was purposely not trying to get into memory controller design. Not
    only have I ripped out the AMD and Intel engineering specification
    sheets on various chipsets to verify the _exact_ IC technology, width
    and number/banking before -- but I've designed memory controllers
    myself.

    But yes, if you have a total of 128-bit IC width in a 64-bit DIMM,
    that's also an issue. But that's just the tip-of-the-iceberg.

    my understanding is that if a dimm is "double-sided", it means that
    it uses 2 CS's.

    There are a lot of "double sided" or "double stacked" or "low density"
    or "double rank" or "low rank" or countless other, non-standard,
    non-uniform descriptions out there. I _refuse_ to use them, as they are
    not standardized and often confusing. E.g., does "low density" mean
    less total width/fewer chips? does it mean the lower density in the
    IC, meaning more total width/more chips?

    The *NLY* way to *ACCURATELY* describe this is to sit down and break
    out each DIMM into the *RAW* number of 32-bit "banks" -- and that means
    you take the bit-width of the *INDIVIDUAL* ICs on every DIMM and
    multiply by number (except for parity/ECC chips).

    So, if you want to get really details, we *CAN* do that! ;->

    Furthermore, some chipsets just do _not_ support certain IC
    technologies, bit-widths and other sizing.

    The chronic issue was the PC100 256MB DIMM for i440BX versus i810/815 --
    they used completely _difference_ DIMMs. The i440BX only supported a
    4-bit with in 32-chip (36-chip for ECC) configuration -- clearly a
    "double sided" registered DIMM. The i810/815 used a 8-bit or 16-bit in
    a 8 or 4 chip configuration, respectively. And even that is a
    mega-oversimplification! ;->

    table 46 on p 182 of AMD's bios guide (doc 26094) appears to allow up
    to 6 ranks for ddr400/2T operation. afaikt, a double-rank dimm is AKA
    double-sided. unfortunatley AMD also adds some weaselish text about
    how MB vendors should validate, etc

    I only listed the JEDEC specifications and recommendations. If you want
    to go outside of those, which some vendors may do, by all means, do!

    Also remember that AMD _might_ be talking about "banks" and not merely
    "DIMMs." "Banks" are 32-bit (like old SIMMs). "DIMMs" are 64-bit.

    BTW, I've seen the term "rank" used 3 different ways.
    Everyone seems to want to simply things with a term or two.
    Impossible.

    Especially when it comes to DDR333 v. DDR400 performance.
    Even reporting 3 or 4 timings is woefully incomplete.

Re: 4gb (4 memory sticks) at 400Mhz on socket 939 MB


max 4000 letters.
Your nickname that display:
In order to stop the spam: 5 + 5 =
QUESTION ON "Linux"

EMSDN.COM