This testcase:
#include <mmintrin.h>
__m64 test() {
__m64 a;
return a;
}
results in quite strange code when compiled with ' -mmmx':
test:
pushl%ebp
movl%esp, %ebp
subl$8, %esp
movl%eax, -8(%ebp) <<<<
movl%edx, -4(%ebp) <<<<
movq-8(%ebp), %mm0
leave
ret
If xmm registers are used (change __m64 into __m128), asm code is K.
It looks there are some problems with register costs, from _.22.lreg:
Pass 0
Register 58 costs: AD_REGS:13000 Q_REGS:13000 NN_Q_REGS:13000
INDEX_REGS:13000 LEGACY_REGS:13000 GENERAL_REGS:13000 MMX_REGS:24000
FLAT_INT_REGS:30000 INT_SSE_REGS:30000 FLAT_INT_SSE_REGS:30000 ALL_REGS:30000
MEM:20000
Register 58 pref GENERAL_REGS or none
Pass 1
Register 58 costs: AD_REGS:13000 Q_REGS:13000 NN_Q_REGS:13000
INDEX_REGS:13000 LEGACY_REGS:13000 GENERAL_REGS:13000 MMX_REGS:24000
FLAT_INT_REGS:30000 INT_SSE_REGS:30000 FLAT_INT_SSE_REGS:30000 ALL_REGS:30000
MEM:20000
(insn:HI 16 28 22 1 (set (reg/i:V2SI 29 mm0 [ <result])
(reg/v:V2SI 58 [ a ])) 768 {*movv2si_internal} (nil)
(expr_list:REG_DEAD (reg/v:V2SI 58 [ a ])
(nil)))
The instructions, marked with '<<<<' are then produced by reload.

Additional Comments From falk at debian dot org 2005-06-15 12:56
(In reply to comment #0)
This testcase:
#include <mmintrin.h>

__m64 test() {
__m64 a;

return a;
}

Well, this is invalid code, so it's not really important what the code
looks like. If it also occurs in valid code, it might be related to PR 7061.

Additional Comments From pinskia at gcc dot gnu dot org 2005-06-15 17:35
a is uninitialized so what do you expect?

Additional Comments From uros at kss-loka dot si 2005-06-21 12:04
New testcase (everything is initialized this time):

here--
#include <mmintrin.h>

__v8qi test ()
{
__v8qi mm0 = {1,2,3,4,5,6,7,8};
__v8qi mm1 = {11,22,33,44,55,66,77,88};
volatile __m64 x;

x = _mm_add_pi8 (mm0, mm1);

return x;
}
here--

Pass 0

Register 67 costs: AD_REGS:4000 Q_REGS:4000 NN_Q_REGS:4000 INDEX_REGS:4000
LEGACY_REGS:4000 GENERAL_REGS:4000 MMX_REGS:46000 INT_SSE_REGS:38000 MEM:16000

Register 67 pref GENERAL_REGS or none

Pass 1

Register 67 costs: AD_REGS:4000 Q_REGS:4000 NN_Q_REGS:4000 INDEX_REGS:4000
LEGACY_REGS:4000 GENERAL_REGS:4000 MMX_REGS:46000 INT_SSE_REGS:38000 MEM:16000

69 registers.

(insn:HI 18 45 22 1 (set (reg:V8QI 67)
(mem/u/i:V8QI (symbol_ref/u:SI ("*.LC2") [flags 0x2]) [0 S8 A64])) 766
{*movv8qi_internal} (nil)
(expr_list:REG_EQUIV (const_vector:V8QI [
(const_int 12 [0xc])
(const_int 24 [0x18])
(const_int 36 [0x24])
(const_int 48 [0x30])
(const_int 60 [0x3c])
(const_int 72 [0x48])
(const_int 84 [0x54])
(const_int 96 [0x60])
])
(nil)))

test:
pushl%ebp
movl%esp, %ebp
subl$24, %esp
movl$807671820, %eax
movl$1616136252, %edx
movl%eax, -8(%ebp)
movl%edx, -4(%ebp)
movl-8(%ebp), %eax
movl-4(%ebp), %edx
movl%eax, -24(%ebp)
movl%edx, -20(%ebp)
movq-24(%ebp), %mm1
leave
movq%mm1, %mm0
ret

Additional Comments From pinskia at gcc dot gnu dot org 2005-06-21 13:06
I think this is more related to PR 14552 which was shown by me that we regressed because we did not
output emms at all before so not emmiting mmx instructions without use of the functions in
mmintrin.h

Additional Comments From pinskia at gcc dot gnu dot org 2005-06-22 20:27
Confirmed.

Additional Comments From pinskia at gcc dot gnu dot org 2005-08-31 19:18
Bug 23660 has been marked as a duplicate of this bug.

Additional Comments From bangerth at dealii dot org 2005-08-31 20:34
In the discussion on the duplicate PR 23660, rth explained part of this here:
W.